Parallel Programming and Optimization with Intel Xeon Phi Coprocessors
Developer Training Event
at the CUNY Graduate Center
Tuesday, October 20, 2015
The Graduate Center
4th Floor - Science Center
356 Fifth Avenue
New York, NY 10016
Reservations are required as seats are limited.
This one-day training features presentations and hands-on exercises on the available programming models and best optimization practices for the Intel Xeon Phi coprocessors, and on the usage of the Intel software development and diagnostic tools.
- Offload and Native: "Hello World" to complex, using MPI.
- Case Study: All aspects of tuning in the N-body calculation.
- Optimization I: Strip-mining for vectorization, parallel reduction.
- Optimization II: Loop tiling, thread affinity.
- Intel Xeon Phi architecture: purpose, organization, prerequisites for good performance, future technology
- Programming models: native, offload, heterogeneous clustering
- Parallel frameworks: automatic vectorization, OpenMP, MPI
- Optimization methods: general, scalar math, vectorization, multithreading, memory access, communication and special topics
*Please bring your own laptop to the training; below is a list of the necessary specifications:
- Windows (XP or newer), Mac OS X (10.5 or later), or Linux (something from the 21st century)
- Wired (Ethernet) and wireless (Wi-Fi 802.11g or later) network connectivity
- Web Browser (any except Microsoft Edge)
- On Windows: Putty and Pageant (www.putty.org) and WinSCP (www.winscp.net)
- On Mac OS X and Linux: ssh client
- Optional: on all operating systems, the free software NoMachine (www.nomachine.com).
This is only necessary if you are not comfortable programming in Linux in a text terminal over an SSH connection.
To register for the workshop, please click here: Register for Oct Training