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Parallel Programming and Optimization for Intel Architecture

Intel and Colfax Developer Training at CUNY

Wednesday, October 19, 2016, 10:00 am - 5:00 pm

The Graduate Center, 4th floor, Science Center Conference Room
365 5th Ave., New York, NY 10016

Intel and Colfax International are offering an updated and expanded hands-on training on code modernization for researchers and engineers in computational disciplines. This training provides the foundation needed to extract more of the parallel compute performance potential found in both Intel Xeon and Intel Xeon Phi processors and coprocessors. The course materials and practical exercises are appropriate for developers beginning their journey to parallel programming, with enough detail to also cater to high-performance computing experts.

Colfax Developer Training is far more than a lecture - it is an experiential learning program. That is because the training contains hands-on component in two forms:
The instructor will demonstrate the methods taught in the course live, on servers with the latest Intel Xeon and Intel Xeon Phi processors.
Attendees will receive remote access to training servers with Intel Xeon Phi coprocessors (KNC) for 1 day and a set of programming and optimization exercises.


  • Registration, light breakfast (10:00 – 10:30 am)
  • Morning session (10:30 am – 1:00 pm)
    • Sneak Peak: What will be covered today (30 min)
    • Programming and Optimization by Example (2 hours)
    • Demonstration of a case study: direct N-body simulation
    • Intel processor architectures
    • Task and data parallelism
    • Memory organization
    • Programming coprocessors and clusters
  • Lunch (1:00 pm – 1:30 pm)
  • Afternoon session (1:30 pm – 5:00 pm)
    • Optimization Pointers (1 hour)
      • Scalar tuning and using Intel compilers
      • Automatic vectorization
      • Multi-threading with OpenMP
      • Optimizing cache usage and memory access
      • Communication control
    • Preparing for Intel Xeon Phi processors (30 min)
      • Compiling with AVX-512
      • Using high-bandwidth memory
      • Leveraging clustering modes
      • Coprocessor form-factor and KNL-F
    • Intel libraries (1 hour)
      • Intel Math Kernel Library (MKL): components, performance tuning
      • Intel Data Analytics Acceleration Library (DAAL): machine learning
    • Intel Python (1 hour)
      • Brief intro to Intel Python (where to get it, installation, etc.)
      • Discussing numpy, scipy and link with Intel MKL
      • How to get the most out of numpy and scipy


    Registration is required to attend this event, as seats are limited. Click here to register

    *This seminar is free of charge for all CUNY Faculty, Staff and Students.
    This event is brought to you by the CUNY HPCC, College of Staten Island, Graduate Center, Intel and Colfax.